Method and/or system for simplifying tree expressions, such as for pattern matching

ABSTRACT

Embodiments of methods, apparatuses, devices and/or systems for simplifying tree expressions, such as for pattern matching, are disclosed.

RELATED APPLICATIONS

The present patent application is a continuation of U.S. nonprovisional patent application Ser. No. 11/007,139, filed on Dec. 7, 2004, titled “METHOD AND/OR SYSTEM FOR SIMPLIFYING TREE EXPRESSIONS, SUCH AS FOR PATTERN MATCHING,” by LeTourneau, which is currently pending and which claims priority from U.S. provisional patent application Ser. No. 60/575,784, filed on May 28, 2004, titled “METHOD AND/OR SYSTEM FOR SIMPLIFYING TREE EXPRESSIONS, SUCH AS FOR PATTERN MATCHING,” by LeTourneau, all of the foregoing herein incorporated by reference in its entirely, and assigned to the assignee of the currently claimed subject matter.

BACKGROUND

This disclosure is related to simplifying tree expressions, such as for pattern matching.

In a variety of fields, data or a set of data, may be represented in a hierarchical fashion. This form of representation may, for example, convey information, such as particular relationships or patterns between particular pieces of data or groups of data and the like. However, manipulating and/or even recognizing specific data representations or patterns is not straight-forward, particularly where the data is arranged in a complex hierarchy. Without loss of generality, examples may include a database, and further, without limitation, a relational database. Techniques for performing operations on such databases or recognizing specific patterns, for example, are computationally complex, time consuming, and/or otherwise cumbersome. A need, therefore, continues to exist for improved techniques for performing such operations and/or recognizing such patterns.

BRIEF DESCRIPTION OF THE DRAWINGS

Subject matter is particularly pointed out and distinctly claimed in the concluding portion of the specification. The claimed subject matter, however, both as to organization and method of operation, together with objects, features, and advantages thereof, may best be understood by reference of the following detailed description when read with the accompanying drawings in which:

FIG. 1 is a schematic diagram of one embodiment of a tree;

FIG. 2 is a schematic diagram illustrating one embodiment of an ordered binary edge labeled tree;

FIG. 3 is a schematic diagram illustrating another embodiment of an ordered binary edge labeled tree;

FIG. 4 is a schematic diagram illustrating an embodiment of a binary edge labeled string;

FIG. 5 is a table illustrating an embodiment of an association between natural numerals and unordered BELTs;

FIG. 6 is a schematic diagram of an embodiment of a binary node labeled tree;

FIG. 7 is a schematic diagram illustrating another embodiment of a binary node labeled tree;

FIG. 8 is a schematic diagram illustrating an embodiment of an inversion operation and an embodiment of a merger operation applied to an embodiment of ordered binary edge labeled trees;

FIG. 9 is a schematic diagram illustrating an embodiment of an associative property applied to an embodiment of a merger operation and an embodiment of ordered binary edge labeled trees;

FIGS. 10a and 10b are schematic diagrams illustrating an embodiment of example elements of the first few equivalence classes for embodiments of ordered binary edge labeled trees;

FIG. 11 is a schematic diagram illustrating an embodiment of a match and a non-match for an embodiment of an ordered binary edge labeled tree; and

FIG. 12 is a schematic diagram illustrating an embodiment of a sample pattern matching problem using embodiments of ordered binary edge labeled trees.

DETAILED DESCRIPTION

In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the claimed subject matter. However, it will be understood by those skilled in the art that the claimed subject matter may be practiced without these specific details. In other instances, well-known methods, procedures, components and/or circuits have not been described in detail so as not to obscure the claimed subject matter.

Some portions of the detailed description which follow are presented in terms of algorithms and/or symbolic representations of operations on data bits or binary digital signals stored within a computing system, such as within a computer or computing system memory. These algorithmic descriptions and/or representations are the techniques used by those of ordinary skill in the data processing arts to convey the substance of their work to others skilled in the art. An algorithm is here, and generally, considered to be a self-consistent sequence of operations and/or similar processing leading to a desired result. The operations and/or processing involve physical manipulations of physical quantities. Typically, although not necessarily, these quantities may take the form of electrical and/or magnetic signals capable of being stored, transferred, combined, compared and/or otherwise manipulated. It has proven convenient, at times, principally for reasons of common usage, to refer to these signals as bits, data, values, elements, symbols, characters, terms, numbers, numerals and/or the like. It should be understood, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels. Unless specifically stated otherwise, as apparent from the following discussion, it is appreciated that throughout this specification discussions utilizing terms such as “processing”, “computing”, “calculating”, “determining” and/or the like refer to the actions and/or processes of a computing platform, such as a computer or a similar electronic computing device, that manipulates and/or transforms data represented as physical electronic and/or magnetic quantities and/or other physical quantities within the computing platform's processors, memories, registers, and/or other information storage, transmission, and/or display devices.

In a variety of fields, data or a set of data, may be represented in a hierarchical fashion. This form of representation may, for example, convey information, such as particular relationships or patterns between particular pieces of data or groups of data and the like. However, manipulating and/or even recognizing specific data representations or patterns is not straight-forward, particularly where the data is arranged in a complex hierarchy. Without loss of generality, examples may include a database and further, without limitation, a relational database. Techniques for performing operations on such databases or recognizing specific patterns, for example, are computationally complex, time consuming, and/or otherwise cumbersome. A need, therefore, continues to exist for improved techniques for performing such operations and/or recognizing such patterns.

As previously discussed, in a variety of fields, it is convenient and/or desirable to represent data, a set of data and/or other information in a hierarchical fashion. In this context, such a hierarchy of data shall be referred to as a “tree.” In a particular embodiment, a tree may comprise a finite, rooted, connected, acyclic graph. Likewise, such trees may be either ordered or unordered. Here, ordered refers to the notion that there is an ordering or precedence among nodes attached to a common node corresponding to the order of the attached nodes shown in a graphical illustration. An ordered tree is illustrated here, for example, in FIG. 1 by embodiment 100. As illustrated, the root of this particular embodiment encompasses node 105. In addition to 105, there are eight other nodes designated 110 to 145, respectively. Likewise, the nodes are connected by branches referred to, in this context, as edges. Thus, the nodes of this tree are connected by eight edges. This embodiment, therefore, illustrates a finite tree that is rooted by node 105. Furthermore, the nodes are connected, meaning, in this context, that a path exists between any two nodes of the tree. The tree is likewise acyclic, meaning here, that no path in the tree forms a complete loop.

As previously suggested, in a variety of contexts, it may be convenient and/or desirable to represent a hierarchy of data and/or other information using a structure, such as the embodiment illustrated in FIG. 1. One particular embodiment, without loss of generality, of a tree may include edges that are labeled with data and/or other values. Likewise, in one particular embodiment, such data and/or values may be limited to binary data, that is, in this example, either a binary one or a binary zero. Here, such an embodiment may be referred to as a binary edge labeled tree (BELT), as shall be discussed in more detail hereinafter. In this embodiment, an ordered binary edge labeled tree is shown. Here, ordered refers to the notion that there is an ordering or precedence among nodes attached to a common node corresponding to the order of the attached nodes shown in a graphical illustration.

One example of an ordered BELT is illustrated by embodiment 200 of FIG. 2. Thus, as illustrated, the edges of the BELT shown in FIG. 2 are labeled with either a binary zero or binary one. FIG. 3 illustrates another embodiment 300 of a different ordered binary edge labeled tree. It is noted that this tree is similar or isomorphic in arrangement or structure to the embodiment of FIG. 2, as shall be explained in more detail hereinafter.

A subset of BELTs may be referred to, in this context, as binary edge labeled strings (BELSs). One embodiment, 400, is illustrated in FIG. 4. Thus, as illustrated by embodiment 400, this particular binary edge labeled string comprises four nodes and three edges, where the edges are labeled, respectively, binary zero, binary one and binary zero. Thus, a binary edge labeled string comprises a binary edge labeled tree in which each node has no more than two edges. To reiterate, in this context, a string comprises a binary edge labeled string and a tree comprises a binary edge labeled tree if each edge of the string or tree respectively stores a single bit. Likewise, in this context, two nodes are employed to support an edge holding a single piece of binary data. At this point, it is worth noting that strings and trees having nodes and edges, such as previously described, may be represented in a computing platform or similar computing device through a data structure or a similar mechanism intended to capture the hierarchical relationship of the data, for example. It is intended that all such embodiments are included within the scope of the claimed subject matter.

As may be apparent by a comparison of FIG. 4 with, for example, FIG. 2 or FIG. 3, typically, a binary edge labeled tree has the ability to be richer and convey more data and/or more information than a binary edge labeled string. This may be observed, by a comparison of FIG. 4 with, for example, FIG. 2 or FIG. 3. Of course, depending on the particular tree and the particular string, there may be contrary examples, such as where the string is particularly large and the tree is particularly small. The aspect of BELTs to be richer in information may be one potential motivation to employ BELTs over BELSs, for example.

Despite the prior observation, as shall be described in more detail hereinafter, an association may be made between any particular binary edge labeled string and a binary edge labeled tree or vice-versa, that is, between any particular binary edge labeled tree and a binary edge labeled string. See, for example, U.S. provisional patent application Ser. No. 60/543,371, filed on Feb. 9, 2004, titled “Manipulating Sets of Hierarchical Data,” assigned to the assignee of the presently claimed subject matter. In particular, an association may be constructed between binary edge labeled trees and binary edge labeled strings by enumerating in a consecutive order binary edge labeled strings and binary edge labeled trees, respectively, and associating the respectively enumerated strings and trees with natural numerals. Of course, many embodiments of associations between trees, whether or not BELTs, and strings, whether or not BELS, or between trees, whether or not BELTs, and natural numerals are possible. It is intended that the claimed subject matter include such embodiments, although the claimed subject matter is not limited in scope to the aforementioned provisional patent application or to employing any of the techniques described in the aforementioned provisional patent application.

Binary edge labeled trees may also be listed or enumerated. See, for example, previously cited U.S. provisional patent application Ser. No. 60/543,371. This is illustrated, here, for example, in FIG. 5. It is noted that this particular figure also includes the associated natural numerals. The association of such numerals for this particular embodiment should be clear based at least in part on previously cited U.S. provisional patent application Ser. No. 60/543,371. However, it is, of course, again noted that the claimed subject matter is not limited in scope to employing the approach or approaches described in U.S. provisional patent application Ser. No. 60/543,371. U.S. provisional patent application Ser. No. 60/543,371 is provided simply as an example of listing or enumerating unordered BELTs. Thus, it is noted further that the BELTs described are unordered.

However, for this particular embodiment, although the claimed subject matter is not limited in scope in this respect, a method of enumerating a set of ordered trees may begin with enumeration of an empty binary edge labeled tree and a one node binary edge labeled tree. Thus, the empty tree is associated with the natural numeral zero and has a symbolic representation as illustrated in FIG. 5 (circle). Likewise, the one node tree, which holds no data, is associated with the natural numeral one and has a graphical representation of a single node. For higher positive natural numbers, ordered trees may be generated by a process described, for example, in “The Lexicographic Generation of Ordered Trees,” by S. Zaks, The Journal of Theoretical Computer Science, Vol. 10(1), pp 63-82, 1980, or, “Enumerating Ordered Trees Lexicographically,” by M. C. Er, Computation Journal, Vol. 28, Issue 5, pp 538-542, 1985. This may be illustrated, for example in FIG. 5, as described in more detail below.

As illustrated, for this particular embodiment, and as previously described, the empty tree has zero nodes and is associated with the natural numeral zero. Likewise, the one node tree root comprises a single node and is associated with the natural numeral one. Thus, to obtain the tree at position two, a root node is attached and connected to the prior root node by an edge. Likewise, here, by convention, the edge is labeled with a binary zero. If, however, the tree formed by the immediately proceeding approach were present in the prior enumeration of trees, then a similar process embodiment is followed, but, instead, the new edge is labeled with a binary one rather than a binary zero. Thus, for example, to obtain the binary edge labeled tree for position three, a new root node is connected to the root node by an edge and that edge is labeled with a binary one.

Continuing with this example, to obtain the binary edge labeled tree for position four, observe that numeral four is the product of numeral two times numeral two. Thus, a union is formed at the root of two trees, where, here, each of those trees is associated with the positive natural numeral two. Likewise, to obtain the binary edge labeled tree for position five, begin with the binary edge labeled tree for position two and follow the previously articulated approach of adding a root and an edge and labeling it with a binary zero.

In this context, adding a root node and an edge and labeling it binary zero is referred to as a “zero-push” operation and adding a root node and an edge and labeling it binary one is referred to as a “one-push” operation. Thus, referring again to FIG. 5, the one-push of the root tree is the tree at position three. This follows from FIG. 9 of previously referenced U.S. provisional patent application Ser. No. 60/543,371, since P(2*1)=P(2)=3. Likewise, the tree at position five is the zero-push of the tree at position 2. Again, this follows from FIG. 9 of the previously referenced U.S. provisional patent application, since P(2*2−1)=P(3)=5.

In the embodiment just described, binary edge labeled trees use binary numerals “0” and “1.” However, the claimed subject matter is not limited in scope to binary edge labeled trees. For example, trees may employ any number of numeral combinations as labels, such as triplets, quadruplets, etc. Thus, using a quadruplet example, it is possible to construct trees, such as a zero-push of a particular tree, a one-push of that tree, a two-push of that tree, and a three-push of that tree. Thus, for such trees, edges may be labeled 0, 1, 2 or 3, etc.

The foregoing discussion has begun to characterize an algebra involving trees, in this particular embodiment, an algebra for ordered binary edge labeled trees or ordered BELTs. The foregoing discussion, therefore, defines a value zero, a zero node tree for this particular embodiment, value one, a one node tree for this particular embodiment, and a monadic operation, previously described as zero-push. For this particular embodiment, the push operation shall also be referred to as the successor operation. For this particular embodiment, this shall be denoted as S(x), where x refers to the tree to which the successor operation is applied. Of course, the claimed subject matter is not limited in scope to the successor operation, S(x), being limited to a zero-push. For example, alternatively, a “one-push” may be employed. For this embodiment, this is analogous, for example, to the convention that “0” represent “off” and “1” represent “on.” Alternatively and equivalently, “1” may be employed to represent “off,” and “0” may be employed to represent “on,” without loss of generality.

For this particular embodiment, two additional operations may be characterized, an “inversion” operation and a “merger” operation. For this particular embodiment, the inversion operation, when applied to a binary edge labeled tree, such as an ordered BELT, refers to replacing a “1” with a “0” and replacing a “0” with a “1”. Likewise, the merger operation with respect to trees refers to merging two trees at their roots. These two operations are illustrated, for example, in FIG. 8.

As will now be appreciated, the inversion operation comprises a monadic operator while the merger operation comprises a binary operator. Likewise, the constants zero/one, referred to above, may be viewed as an operation having no argument or as a zero argument operator or operation. Thus, this operation, in effect, returns the same value whenever applied. Here, for this particular embodiment, the constant value zero, or zero argument operation that returns “0,” is denoted as “c,” the merger operator is denoted as “*”, the inversion operation is denoted as “′”, and the successor operator is denoted as previously described.

It may be shown that ordered binary edge labeled trees satisfy the following nine tree expressions referred to, for this particular embodiment, as the “basis expressions.” Specifically, any combination of four operations on a set of objects that satisfy these nine basis expressions generates an isomorph of the ordered binary edge labeled trees under the operations described above. x″=x;  (1) ((x*y)*z)=(x*(y*z));  (2) (c*x)=c;  (3) (x*c)=c;  (4) (S(c)*x)=x;  (5) (x*S(c)))=x;  (6) c′=c;  (7) S(c)′=S(c);  (8) (x*y)′=(x′*y′).  (9)

Thus, examining these tree expressions, in turn, should provide insight into the properties of ordered BELTs. The first tree expression above demonstrates that applying the inversion operation successively to an object returns the original object, here an ordered binary edge labeled tree. The second tree expression above is referred to as the associative property. This property with respect to ordered binary edge labeled trees is demonstrated, for example, in FIG. 9.

As previously described, for this particular embodiment, the zero tree is denoted by the constant “c.” Thus, as illustrated, in tree expressions (3) and (4), the merger of the zero tree with any other ordered BELT produces the zero tree. Likewise, the successor of the zero tree is the one tree or one node tree, also referred to here also as the unity tree. As illustrated by tree expressions (5) and (6), a merger of the unity tree with any other ordered BELT produces the ordered BELT. Likewise, as demonstrated by these tree expressions, changing the order of the merger does not change the result for either the zero tree or the unity tree.

Tree expressions (7) and (8) demonstrate that the inverse or inversion of the zero tree and the inverse or inversion of the unity tree in each respective case produces the same tree. Likewise, the final tree expression above, (9), demonstrates the distributive property for the inversion operation over the merger operation. Thus, the inverse of the merger of two ordered BELTs provides the same result as the merger of the inverses of the respective ordered BELTs. In this context, any set of tree expressions, such as the nine basis tree expressions, may be thought of a symmetric set of “re-write rules” with the tree expression on the left-hand side of an equality sign being replaced by the tree expression on the right-hand side of the equality sign or vice-versa.

One additional aspect of the foregoing basis relationships that was omitted from this embodiment, but that might be included in alternate embodiments, is the addition of a second monadic operator, denoted here as “T(x).” This particular operator is omitted here without loss of generality at least in part because it may be defined in terms of operators previously described. More particularly, T(x)=S(x′)′, may be included in alternate embodiments. This approach, though not necessary from an implementation perspective, may add some symmetry and elegance to the above basis relationships. For example, it may be demonstrated that S(x)′=T(x′) and S(x′)=T(x)′. In some respects, this relationship is analogous to the relationship between the logical operations OR and AND in Boolean algebra, where −(A AND B)=−A OR −B, and −(A OR B)=−A AND −B. However, as indicated above, this may be omitted without loss of generality and, therefore, for implementation purposes, it may be easier to implement four operators rather than five.

As is well-known and straight-forward, a set of rewrite rules defines an equivalence relationship if and only if the rewrite rules are reflexive, symmetric and transitive. Likewise, as follows from another well-known mathematical theorem concerning such reflexive, symmetric, and transitive relations, see, for example, Theorem 16.3 on page 65 of An Introduction to Modern Algebra and Matrix Theory, by Ross A. Beaumant and Richard W. Ball, available from Rhinehart and Co., NY, 1954, such a set of rewrite rules divides the ground terms of the associated algebra, here binary edge labeled trees with no variables, into disjoint equivalence classes that may be viewed as elements of a model of the tree expressions. The operations indicated and/or implied by the tree expressions, therefore, are interpreted as operations applied to one or more equivalence classes to produce an equivalence class. For example, in the case of the binary operation merger, to know the equivalence class of the result of a merger, a representative ordered BELT is selected from a first equivalence class, a representative is selected from a second equivalence class and the representatives are combined. The product of a merger operation, in this embodiment, is the equivalence class associated with the merger of the representatives. A similar approach may be likewise applied to the previously described monadic operations.

As previously suggested, a set of operations that satisfies the nine basis tree expressions previously described is isomorphic to the set of finite, rooted, ordered binary edge labeled trees. Thus, or more particularly, there is a one-to-one relationship between the equivalence classes that satisfy the nine tree expressions and the finite, rooted, ordered binary edge labeled trees. In this particular embodiment, this algebra includes the zero tree, denoted c, the unity tree, denoted S(c), the monadic operator of inversion, denoted ' (apostrophe), the monadic operator of succession, denoted S(x), and the binary operator of merger, denoted * (asterisk).

For this particular embodiment, to illustrate the concept of equivalence classes, FIGS. 10a and 10b provide the first few finite, rooted, ordered binary edge labeled trees with a few members of the equivalence class of terms associated with those trees. Thus, for this particular embodiment, in this context, a specific ordered binary edge labeled tree may constitute an equivalence class.

Of course, as previously alluded to, for this particular embodiment, a useful distinction is also made between an ordered binary edge labeled tree and an unordered binary edge labeled tree. In this context, and as previously suggested, the notion of “ordered” refers to the property that the nodes attached to a particular node form an ordered set, the order corresponding to the order in which those nodes are displayed in the graph of the tree. However, it may likewise be observed that two ordered trees are resident in the same equivalence class of unordered BELTs if and only if the two trees are commutative translates of each other. In other the words, the two trees are equivalent and in the same unordered BELT equivalence class where the trees differ only in the order of the attached nodes. This prior observation demonstrates that by adding a tenth tree expression as follows: (x*y)=(y*x).  (10a) referred to here as commutativity, the nine basis tree expressions, plus the tree expression above, form a model or algebra that is isomorphic to the unordered binary edge labeled trees. In a similar fashion, if, instead, the tenth tree expression is the following expression: S(x*y)=S(x)*y  (10b) referred to here as linearity, alternately, an algebra of objects that satisfies such ten tree expressions is isomorphic to the four operations applied to the set of finite binary edge labeled strings. See, for example, previously referenced U.S. provisional patent application 60/543,371.

The power of the observations made above, as shall become more clear hereinafter, is that by applying the nine basis tree expressions, it shall be possible, through repetitive application of algebraic manipulations, to simplify and, in some cases, solve a tree expression in ordered binary edge labeled. Likewise, in a similar fashion a similar proposition may be made and a similar process may be applied using a set of basis expressions to simplify tree expressions for unordered binary edge labeled trees and/or to simplify string expressions for finite binary edge labeled strings.

As shall be demonstrated below, by employing the nine basis tree expressions, in the case of ordered BELTs, and eight basis tree expressions in the case of unordered BELTs or BELS, it may be possible to derive a mechanism for simplifying any expression in the four previously described operators, regardless of complexity. For this particular embodiment, for example, regarding ordered BELTs, the approach employed is to match all possible single term expressions for ordered trees on the left-hand side of an equality with all possible single term expressions for ordered trees on the right-hand side of the equality. Any tree expression to be simplified comprises a combination of such delineated possible single term tree expressions. Therefore, for this particular embodiment, to simplify or reduce a tree expression, a set of algebraic manipulations may be repetitively applied to reduce or simplify a tree expression into a set of interrelated queries, in this particular embodiment, queries interrelated by Boolean operations, as illustrated below.

Although the claimed subject matter is not limited in scope in this respect, one technique for implementing this approach may be to apply a table look up approach. Therefore, the table may contain the single term tree expressions discussed above and illustrated in more detail below. Thus, when confronted with a tree expression to be simplified or reduced, table look ups may be applied repetitively to reduce a tree expression until it is simplified to a point where it may not be reduced or simplified further by applying such algebraic manipulations. Once this has been accomplished, the set of queries that has resulted may then be applied to one or more tree objects to produce a result that makes the original or initial tree expression true. Likewise, alternatively, this approach may ultimately indicate that no such tree expression is possible.

Techniques for performing table look-ups are well-known and well-understood. Thus, this will not be discussed in detail here. However, it shall be appreciated that any and all of the previously described and/or later described processing, operations, conversions, transformations, manipulations, etc. of strings, trees, numerals, data, etc. may be performed on one or more computing platforms or similar computing devices, such as those that may include a memory to store a table as just described, although, the claimed subject matter is not necessarily limited in scope to this particular approach. Thus, for example, a hierarchy of data, such as a tree as previously described, for example, may be formed. Likewise, operations and/or manipulations, as described, may be performed; however, operations and/or manipulations in addition to those described or instead of those described may also be applied. It is intended that the claimed subject matter cover such embodiments.

The following algebraic manipulation examples, numbered zero through forty-six below, delineate the extent of the possibilities of single term tree expressions and their simplification to accomplish the result described above for this particular embodiment. What follows is a listing of these forty seven expressions to demonstrate a technique for applying algebraic manipulations that take a given tree expression and return a simpler form. Of course, for some embodiments, such as a table look-up, it may be desirable to omit from such a table look up those expressions that are “always” and/or “never” true, such as c=c and/or c=S(c), respectively, for example. It is, of course, understood here that terms such as “always,” “never,” “if and only if” (iff) and the like, are limited in context to the particular embodiment.

Example 0

c=c

This is a logical truth.

Example 1

c=x

This is true iff x=c.

Example 2

c=S(x)

This is true nowhere because c is never equal to S(x), for any x, in this embodiment.

Example 3

c=x′

This is true iff c=x. This may be shown by the following argument:

c=x′ iff c′=″ iff c′=x iff c=x.

Example 4

c=(x*y)

This is true iff x=c or y=c.

The examples above have c on the left-hand side with all other syntactic variations on the right-hand side. Next are cases where the left-hand side is x. In these cases, the right hand side is assumed to be something other than c because this case was addressed above.

Example 5

x=x

This is a logical validity and true everywhere.

Example 6

x=y

This is true iff x=y.

Example 7

x=S(x).

This is never true.

Example 8

x=S(y)

This is true iff x=S(y).

Example 9

x=x′

This is true iff x=c or x=S(c).

Example 10

x=y′

This is true iff x=y′ or y=x′.

Next are the cases where the term on the right is a merger, *, of two simpler terms.

Example 11

x=(x*x)

This is true iff x=c or x=S(c).

Example 12

x=(x*y)

This is true iff x=c or y=S(c).

Example 13

x=(y*x)

This is true iff x=c or y=S(c).

Example 14

x=(y*z)

This is true iff x can be decomposed into two parts connected by the * operation where y is the first part of the decomposition and z is the remainder. The number of possible terms that y might be for this to be true is found by seeing x as an ordered multiple product and letting y be the initial product of any number of these terms. Thus, this statement is true iff the disjunction that lists all possible ways of assigning y to an initial product of the parts and assigning z to the remaining parts is true. The last term in this disjunction assigns y to x and S(c) to z. Next are cases where the left-hand side is S(x) or S(x′).

Example 15

S(x)=S(x)

This is always true.

Example 16

S(x)=S(y)

This is true iff x=y.

Here, by way of illustration, a more complex equation is reduced to a simpler equation. In general, as previously suggested, for this particular embodiment, reducing a complex expression to a possible Boolean combination of simpler expressions provides a mechanism to determine conditions that make the tree expression true.

Example 17

S(x)=x′

This is never true.

Example 18

S(x)=y′

This is true iff (x=c and y=S(c)) or y=S(x)′.

Example 19

S(x)=(x*x)

This is never true.

Example 20

S(x)=(x*y)

This equation is true iff x=S(c) and y=S(S(c)).

Example 21

S(x)=(y*x)

This is solvable iff x=S(c) and y=S(S(c)).

Example 22

S(x)=(y*z)

This equation is solvable iff either (a) (y=S(c) and z=S(x)) or

-   -   (b) (z=S(c) and y=S(x)).

Example 23

S(x′)=(x*x)

This equation is never true.

Example 24

S(x′)=(y*y)

This equation is true iff x=c and y=S(c).

Example 25

S(x′)=(x*y)

This is true iff x=S(c) and y=S(S(c)).

Example 26

S(x′)=(y*x)

This is true iff x=S(c) and y=S(S(c)).

Example 27

S(x′)=(y*z)

This is solvable iff

((x=c and y=S(c)) and z=S(c)) or

(x=S(c) and ((y=S(c) and z=S(S(c)) or (z=S(c) and y=S(S(c)))).

Next are the cases where the left-hand side is x′.

Example 28

x′=x′

This is always true.

Example 29

x′=y′

This is true iff x=y.

Example 30

x′=(x*x)

This is true iff x=c or x=S(c).

Example 31

x′=(x*y)

This is true iff x=c or (x=S(c) and y=S(c)).

Example 32

x′=(y*z)

This is true iff x=c or (x=S(c) and y=S(c)).

Example 33

x′=(y*z)

This is solvable iff x=(y′*z′) which is solvable iff

[y=c and x=c] or

[y=S(c) and z=x′] or

[z=c and x=c] or

[z=S(c) and y=x′] or

x can be decomposed into (y′*z′).

Example 34

S(x)′=(x*x)

This equation is never true.

Example 35

S(x)′=(y*y)

This equation is true iff x=c and y=S(c).

Example 36

S(x)′=(x*y)

This is true iff x=S(c) and y=S(S(c))′.

Example 37

S(x)′=(y*z)

This is true iff x=S(c) and y=S(S(c))′.

Example 38

S(x)′=(y*z)

This is solvable iff S(x)=(y′*z′) which is solvable iff

[y=S(c) and z=S(x)] or

[z=S(c) and y=S(x)].

The remaining cases are where the left-hand side is a merger operation.

Example 39

(x*x)=(x*x)

This is always true.

Example 40

(x*x)=(y*y)

True iff x=y.

Example 41

(x*x)=(x*y)

True iff x=y.

Example 42

(x*x)=(y*x)

True iff x=u.

Example 43

(x*x)=(u*v)

This is solvable iff

-   -   (a) (x=c and u=c or v=c)); or     -   (b) (x=S(c) and (u=(S(c) and v=S(c)); or     -   (c) there exists terms x₁, x₂, v₁, v₂ such that x=(x₁*x₂),         v=(v₁*v₂) and x₁=u and x=v₂; or     -   (d) there exists terms u₁, u₂, x₁, x₂ such that u=(u₁*u₂),         x=(x₁*x₂), x=u₁ and x₂=v; or     -   (e) x=u and y=v.

Example 44

(x*y)=(x*v)

True iff x=c or (y=c and v=c) or y=v.

Example 45

(x*y)=(u*x)

True iff x=c or (y=c and u=c) or y=u.

Example 46

(x*y)=(u*v)

This is solvable iff

-   -   (a) (x=c and (u=c or v=c)); or     -   (b) (x=S(c) and (u=S(c) and v=S(c)); or     -   (c) there exists terms x₁, x₂, v₁, v₂ such that x=(x₁*x₂),         v=(v₁*v₂) and x₁=u and x=v₂; or     -   (d) there exists terms u₁, u₂, x₁, x₂ such that u=(u₁*u₂),         x=(x₁*x₂), x=u₁ and x₂=v; or     -   (e) x=u and y=v.

Previously described is an embodiment of a method or technique for reducing or simplifying a tree expression to obtain a result that provides the condition(s) under which the tree expression is true. For example, if the left-hand side is a tree expression in x and the right-hand side is a tree expression in ground terms, this may reduce to another tree expression that makes the overall initial tree expression true. Of course, the claimed subject matter is not limited in scope to only this particular embodiment.

Another embodiment of a method or technique for reducing or simplifying a tree expression may involve segregating simplification with the basis relationships from simplifying using the 47 expressions provided above. For example, from an implementation perspective, it may simplify results to apply the basis expressions before applying the 47 derived expressions. In one particular embodiment, although, of course, the claimed subject matter is not limited in scope in this respect, the basis expressions may be applied in the following specific order to simplify the given tree expression: x″=x;  (1) (x*y)′=(x′*y′);  (9) x″=x;  (1) c′=c;  (7) (c*x)=c;  (3) (x*c)=c;  (4) S(c)′=S(c);  (8) (S(c)*x)=x;  (5) (x*S(c)))=x;  (6) ((x*y)*z)=(x′(y*z)).  (2) Once the tree expression has been simplified using these basis expressions, the 47 derived expressions may be applied to further reduce or simplify the tree expression. Of course, again, this is merely one possible approach and the claimed subject matter is not limited in scope to this particular embodiment.

Embodiments of a method of reducing or simplifying tree expressions have a variety of potentially useful applications. As described previously, trees provide a technique for structuring and/or depicting hierarchical data. Thus, for example, trees may be employed to represent language sentence structures, computer programs, algebraic formulae, molecular structures, family relationships and more. For example, one potential application of such a tree reduction technique is in the area of pattern matching. Thus, in pattern matching, substructures, in the form of a tree, for example, may be located within a larger structure, also in the form of a tree, referred to in this context as the target. This may be accomplished by comparing the structures; however, typically, such a comparison is complex, cumbersome, and/or time consuming. Although the claimed subject matter is not limited in scope to pattern matching or to any of the other potential applications described above, it may be instructive to work through at least one particular example of applying the previously described tree reduction approach to a pattern matching problem to demonstrate the power and/or versatility of this particular embodiment.

Within this particular context and for this particular embodiment, there are a number of potential pattern matching inquiries that may be made. Although these are simply examples and the claimed subject matter is not limited in scope to only these particular inquiries, one such inquiry, for example, may be whether a first tree, such as an ordered binary edge labeled tree, is equal to a second binary edge labeled tree? To phrase this differently, it may be useful to determine whether the trees match exactly. Likewise, another such query, or active verb, may be referred to in this context as a rooted partial sub tree (RPS) query or inquiry. This particular type of query or inquiry is demonstrated with reference to FIG. 11.

Thus, in Examples 1 and 2 of FIG. 11, the right-hand sides depict a binary edge labeled tree for the numeral 60543371. See, for example, the previously referenced U.S. provisional patent application 60/543,371. Here, in Example 1, the left-hand side of FIG. 11 provides a rooted partial subtree of the right-hand side. In this context, the term rooted refers to a comparison in which the roots of the left-hand side and the right-hand side are matched or compared. The notion of a partial subtree is to be distinguished from the notion of a full subtree. In this context, therefore, a rooted full subtree refers to the equality described above. Likewise, then, a rooted partial subtree refers to a match with another tree, but only to the extent of the nodes and edges present for the rooted partial subtree. Thus, the target may contain additional nodes, edges, and/or labels that are omitted from the rooted partial subtree. By way of contrast, Example 2 demonstrates on the left-hand side a tree that is not a rooted partial subtree of the right-hand side tree, although the left-hand side tree has the same arrangement of nodes and edges as a rooted partial subtree of the right-hand side. Thus, another type of match may occur where the arrangement of the nodes and edges match, but the labels do not match, as in Example 2.

One query or question to be posed, for the purposes of pattern matching, is whether the tree on the left-hand side, such as in example one, is a rooted partial subtree of the tree on the right-hand side. In addition to that, several other potential questions may be posed and potentially answered. For example, if the tree on the left-hand side is a rooted partial subtree of the tree on the right-hand side, it may be useful to know how many times this rooted partial subtree is present in the right-hand side tree. Likewise, assume that a rooted partial subtree is present more than once. It may be useful to have a mechanism to identify one of the several rooted partial subtrees to a machine, for example, for further processing.

It also may be desirable, in other circumstances, to determine whether there is a match between a rooted tree and a subtree that is not rooted. In this context this may be referred to, for example, as a “projected match”. In this context, this refers to projecting one tree into another tree without matching corresponding roots and having the form and labels of the projected tree still be preserved in the tree in which it is projected.

Likewise, with reference to Example 2, in which the tree on the left-hand side does not match the tree on the right-hand side, an alternative query or question may relate to a measurement of the similarities and/or differences, as an embodiment of a measurement of the matching. For example, particular branches of the tree on the left-hand side may match with particular branches of the tree on the right-hand side, although overall, the entire tree on the left-hand side may not match to a subportion of the tree on the right-hand side, in this particular example. Thus, it may be appropriate, for example, to weight the matching in some form. Such an approach, for example, might be employed in data analysis, as simply one example. In one embodiment, for example, it may be desirable to identify a partial match that results in the maximum number of matching nodes and edges; likewise, in a different embodiment, it may be desirable to identify a partial match such that the match is closest to or most remote from the root. Again, any one of a number of other approaches is possible and such approaches included within the scope of the claimed subject matter. Thus, it may be desirable, assuming there is no identical match, to identify the closest match where “closest” or “most remote” is defined with respect to a particular weighted criterion designed to achieve a particular objective, such as the examples previously described.

For this particular embodiment, as previously suggested, a method of performing pattern matching may include constructing a tree expression. A tree expression may be constructed in a manner so as to match a first pattern, represented as a first tree, with or against a second pattern, represented as a second tree. After such a tree expression has been formulated or constructed, the conditions under which the tree expression is true may be determined. This may be accomplished, for example, by applying the previously described techniques for simplifying or reducing tree expressions. Likewise, as previously suggested, alternatively, such an approach may determine the conditions under which the formulated or constructed tree expression is false rather than true.

In order to appreciate the power and/or versatility of this particular application, a simple example is desirable. Therefore, FIG. 12 is a schematic diagram illustrating one example embodiment 1200 of an ordered binary edge labeled tree. This particular tree has a root that is designated as “book.” This tree, designated as T in FIG. 12, might, for example, comprise a partial subtree of a larger tree referred to as “library,” where library is a forest of trees representing various books.

Continuing with this example, emanating from the root node “book” are five edges, three of them labeled with a “0” and two of them labeled with a “1”. For this particular embodiment, a “0” designates chapters of the book, whereas a “1” designates appendices of the book. Each edge includes another node other than the root node to support the edge that is labeled as just described. Likewise, as illustrated in FIG. 12, each of the chapters and appendices has attached to that node, one or more additional edges and nodes. These additional edges and nodes, in this particular embodiment, designate the particular numerical designation of the particular chapter or appendix. Thus, in FIG. 12, chapters one, two and three and appendices one and two are illustrated. For example, in a database, this tree may operate as a pointer to designate the location in memory of these particular chapters and appendices. It may, thus, be desirable, for example, to retrieve a particular chapter of “book” from storage.

FIGS. 10a and 10b provide a short list of ordered binary edge labeled trees corresponding to several natural numerals. Thus, by way of comparison between FIGS. 10a and 10b , and FIG. 12, it should be clear which nodes and edges designate chapters one to three and appendices one and two. The tree expression also shown in FIG. 12, therefore, is intended to demonstrate the application of algebraic manipulations to perform tree expression simplification in order to accomplish pattern matching, such as previously described.

The simplification may be accomplished as follows. The tree expression, S(x)<=(R) y, where “<=” denotes “partial rooted subtree of,” indicates that the successor of tree x is a rooted partial subtree of the tree, T, in which book is a root node. The second half of the tree expression above comprises a tree equation in x. Thus, the expression (S(x) <=(R) y) may be reduced by simplifying the expression S(x) in the manner previously described above, for example. Likewise, simplifying the expression (y=S(S(S(c))′) involves several successive simplification operations involving the inverse operation and applying the successor operation. Again, as previously discussed, this may be accomplished through application of a table look up technique. As previously explained, a complex tree expression may therefore be reduced into simpler tree expressions that are interrelated by Boolean logic. This is demonstrated, for example, through the simplification of tree expressions as illustrated in Examples 0 to 46 above for ordered trees. Thus, in this example, these simplified tree expressions comprise queries interrelated by Boolean operations.

Furthermore, to apply such queries such as, for example, determining whether a first tree is a rooted partial subtree of another tree, as indicated by the tree expression above, involves the application of known programming techniques. See, for example, Chapter 4, “Tree Isomorphism,” of Algorithms on Trees and Graphs, by Gabriel Valiente, published by Springer, 2002. Such well-known and well-understood programming techniques will not be discussed here in any detail.

Much of the prior discussion was provided in the context of ordered binary edge labeled trees. However, a similar approach may be applied to unordered binary edge labeled trees, for example. In general, it is understood that performing such simplifications or reductions to unordered BELTs presents more of a processing challenge. See, for example, “Tree Matching Problems with Applications to Structured Text Databases,” by Pekka Kilpelainen, Ph.D dissertation, Department of Computer Science, University of Helsinki, Finland, November, 1992. A potential reason may be that a greater number of possibilities are present combinatorially in those situations in which nodes may be unordered rather than ordered. Nonetheless, to address such unordered trees, as previously for ordered trees, we begin with the basis expressions. More specifically, a set of basis expressions may be isomorphic to applying the four previously described operations, to unordered BELTs. Here, there are eight basis expressions rather than nine. x″=x;  (1) ((x*y)*z)=(x*(y*z));  (2) (c*x)=c;  (3) (S(c)*x)=x;  (4) c′=c;  (5) S(c)′=S(c);  (6) (x*y)′=(x′*y′);  (7) (x*y)=(y*x).  (8)

It is worth observing that expressions (4) and (6) from the previous set of expressions have been omitted here. Such expressions are redundant in light of expression (8) above, which has been added. As previously, then, these expressions may be employed to solve single term expression that may be employed through a table look-up process, for example, to simplify more complex tree expressions. As previously, the tree expressions are provided below. Again, “never,” “always,” “iff” and the like are limited

Example 0

c=c

This is a logical truth.

Example 1

c=x

This is true iff x=c.

Example 2

c=S(x)

This is true nowhere because c is never equal to S(x), for any x, in this embodiment.

Example 3

c=x′

This is true iff c=x. This may be shown by the following argument:

c=x′ iff c′=x″ iff c′=x iff c=x.

Example 4

c=(x*y)

This is true iff x=c or y=c.

Example 5

x=x

This is a logical validity and true everywhere.

Example 6

x=y

This is true iff x=y.

Example 7

x=S(x).

This is never true.

Example 8

x=S(y)

This is true iff x=S(y).

Example 9

x=x′

This is true iff x=c or x=S(c).

Example 10

x=y′

This is true iff x=y′ or y=x′.

Example 11

x=(x*x)

This is true iff x=c or x=S(c).

Example 12

x=(x*y)

This is true iff x=c or y=S(c).

Example 13

x=(y*x)

This is true iff x=c or y=S(c).

Example 14

x=(y*z)

This is true iff x can be decomposed into two parts connected by the * operation where y is the first part of the decomposition and z is the remainder. The number of possible terms that y might be for this to be true is found by seeing x as an unordered multiple product and letting y be the initial product of any number of these terms. Thus, this statement is true iff the disjunction that lists all possible ways of assigning y to an initial product of the parts and assigning z to the remaining parts is true. The last term in this discussion assigns y to x and S(c) to z. Next are cases were the left-hand side is S(x) or S(x′).

Example 15

S(x)=S(x)

This is always true.

Example 16

S(x)=S(y)

This is true iff x=y.

Here, by way of illustration, a more complex equation is reduced to a simpler equation. In general, as previously suggested, for this particular embodiment, reducing a complex expression to a possible Boolean combination of simpler expressions provides a mechanism to determine conditions that make the tree expression true.

Example 17

S(x)=x′

This is never true.

Example 18

S(x)=y′

This is true iff (x=c and y=S(c)) or y=S(x)′.

Example 19

S(x)=(x*x)

This is never true.

Example 20

S(x)=(x*y)

This equation is true iff x=S(c) and y=S(S(c)).

Example 21

S(x)=(y*x)

This is solvable iff x=S(c) and y=S(S(c)).

Example 22

S(x)=(y*z)

This equation is solvable iff either (a) (y=S(c) and z=S(x)) or

-   -   (c) (z=S(c) and y=S(x)).

Example 23

S(x′)=(x*x)

This equation is never true.

Example 24

S(x′)=(y*y)

This equation is true iff x=c and y=S(c).

Example 25

S(x′)=(x*y)

This is true iff x=S(c) and y=S(S(c)).

Example 26

S(x′)=(y*x)

This is true iff x=S(c) and y=S(S(c)).

Example 27

S(x′)=(y*z)

This is solvable iff

((x=c and y=S(c)) and z=S(c)) or

(x=S(c) and ((y=S(c) and z=S(S(c)) or (z=S(c) and y=S(S(c)))).

Next are the cases were the left-hand side is x′.

Example 27

x′=x′

This is always true.

Example 29

x′=y′

This is true iff x=y.

Example 30

x′=(x*x)

This is true iff x=c or x=S(c).

Example 31

x′=(x*y)

This is true iff x=c or (x=S(c) and y=S(c)).

Example 32

x′=(y*z)

This is true iff x=c or (x=S(c) and y=S(c)).

Example 33

x′=(y*z)

This is solvable iff either

-   -   (x=c and (y=c or z=c)); or     -   (x=S(c) and y=S(c) and z=S(c)); or     -   (x=(y′*z′)); or     -   (x=(z′*y′))

Example 34

S(x)′=(x*x)

This equation is never true.

Example 35

S(x)′=(y*y)

This equation is true iff x=c and y=S(c).

Example 36

S(x)′=(x*y)

This is true iff x=S(c) and y=S(S(c))′.

Example 37

S(x)′=(y*z)

This is true iff x=S(c) and y=S(S(c))′.

Example 38

S(x)′=(y*z)

This is solvable iff S(x)=(y′*z′) which is solvable if

[y=S(c) and z=S(x)] or

[z=S(c) and y=S(x)].

Example 39

(x*x)=(x*x)

This is always true.

Example 40

(x*x)=(y*y)

True iff x=y.

Example 41

(x*x)=(x*y)

True iff x=v.

Example 42

(x*x)=(y*x)

True iff x=u.

Example 43

(x*x)=(u*v)

This is solvable iff

-   -   (d) (x=c and (u=c or v=c)); or     -   (e) (x=S(c) and (u=S(c) and v=S(c)); or     -   (f) there exists terms x₁, x₂, v₁, v₂ such that x=(x₁*x₂),         v=(v₁*v₂) and x₁=u and x=v₂; or     -   (f) there exists terms u₁, u₂, x₁, x₂ such that u=(u₁*u₂),         x=(x₁*x₂), x=u₁ and x₂=v; or     -   (g) x=u and y=v.

Example 44

(x*y)=(x*v)

True iff y=v.

Example 45

(x*y)=(u*x)

True iff x=u.

Example 46

(x*y)=(u*v)

This is solvable iff

-   -   (g) (x=c and (u=c or v=c)); or     -   (h) (y=c and (u=c or v=c)); or     -   (i) (x=S(c) and y=(u*v)); or     -   (j) (y=S(c) and x=(u*v)); or     -   (k) there exists terms x₁, x₂, v₁, v₂ such that x=(x₁*x₂),         v=(v₁*v₂) and x₁=u and y=v₂; or     -   (f) there exists terms u₁, u₂, y₁, y₂ such that u=(u₁*u₂),         y=(y₁*y₂), x=u₁ and y₂=v; or     -   (g) x=u and y=v.         Thus, a similar process as previously described for ordered         trees may be applied for unordered trees using the 47         expressions above.

Of course, the claimed subject matter is not limited to ordered or unordered binary edge labeled trees. For example, as described in previously cited U.S. provisional patent application 60/543,371, binary edge labeled trees and binary node labeled trees may be employed nearly interchangeably to represent substantially the same hierarchy of data. In particular, a binary node labeled tree may be associated with a binary edge labeled tree where the nodes of the binary node labeled tree take the same values as the edges of the binary edge labeled tree, except that the root node of the binary node labeled tree may comprise a node having a zero value or a null value. This is illustrated, for example, in FIG. 6. Thus, rather than employing binary edge labeled trees, the previously described embodiments may alternatively be performed using binary node labeled trees. As one example embodiment, operations and/or manipulations may be employed using binary edge labeled trees and the resulting binary edge labeled tree may be converted to a binary node labeled tree. However, in another embodiment, operations and/or manipulations may be performed directly using binary node labeled trees where a different association embodiment is employed.

In accordance with the claimed subject matter, therefore, any tree, regardless of whether it is binary edge labeled, binary node labeled, non-binary, a feature tree, or otherwise, may be manipulated and/or operated upon in a manner similar to the approach of the previously described embodiments. Typically, different association embodiments shall be employed, depending at least in part, for example, upon the particular type of tree and/or string, as described, for example in the previously referenced U.S. provisional patent application 60/543,371. For example, as described in the previously referenced US provisional patent application, a node labeled tree in which the nodes are labeled with natural numerals or data values may be converted to a binary edge labeled tree. Furthermore, this may be accomplished with approximately the same amount of storage. For example, for this particular embodiment, this may involve substantially the same amount of node and/or edge data label values. However, for convenience, without intending to limit the scope of the claimed subject matter in any way, here, operations and/or manipulations and the like have been described primarily in the context of BELTs.

In another embodiment, however, a particular tree may include null types or, more particularly, some node values denoted by the empty set. This is illustrated, for example, by the tree in FIG. 7, although, of course, this is simply one example. Likewise, this example is an example of a binary node labeled tree with nulls, although, the claimed subject matter is not limited in scope in this respect. An advantage of employing null types includes the ability to address a broader array of hierarchical data sets. For example, without loss of generality and not intending to limit the scope of the claimed subject matter in any way, a null type permits representing in a database or a relational database, as two examples, situations where a particular attribute does not exist. As may be appreciated, this is different from a situation, for example, where a particular attribute may take on a numeral value of zero. Again, as described in the previously referenced U.S. provisional patent application 60/543,371, a tree with nulls, as described above, may be converted to a tree without nulls; however, the claimed subject matter is not limited in scope in this respect, of course. Thus, it may be desirable to be able to address both situations when representing, operating upon, manipulating and/or searching for patterns regarding hierarchical sets of data.

Likewise, in an alternative embodiment, a node labeled tree, for example, may comprise fixed length tuples of numerals. For such an embodiment, such multiple numerals may be combined into a single numeral, such as by employing Cantor pairing operations, for example. See, for example, Logical Number Theory, An Introduction, by Craig Smorynski, pp, 14-23, available from Springer-Verlag, 1991. This approach should produce a tree to which the previously described embodiments may then be applied. Furthermore, for one embodiment, a tree in which nodes are labeled with numerals or numerical data, rather than binary data, may be converted to a binary edge labeled tree and/or binary node labeled tree, and, for another embodiment, a tree in which edges are labeled with numerals or numerical data, rather than binary data, may be converted to a binary edge labeled tree and/or binary node labeled tree. See previously referenced U.S. provisional patent application Ser. No. 60/543,371.

Furthermore, a tree in which both the nodes and the edges are labeled may be referred to in this context as a feature tree and may be converted to a binary edge labeled tree and/or binary node labeled tree. For example, without intending to limit the scope of the claimed subject matter, in one approach, a feature tree may be converted by converting any labeled node with its labeled outgoing edge to an ordered pair of labels for the particular node. Using the embodiment described, for example in the previously referenced US provisional patent application, this tree may then be converted to a binary edge labeled tree.

In yet another embodiment, for trees in which data labels do not comprise simply natural numerals, such as, as one example, trees that include negative numerals, such data labels may be converted to an ordered pair of numerals. For example, the first numeral may represent a data type. Examples include a data type such as negative, dollars, etc. As described above, such trees may also be converted to binary edge labeled trees, such as by applying the embodiment of the previously referenced US provisional patent application, for example. However, again, this is provided for purposes of explanation and illustration. The claimed subject matter is not limited in scope to employing the approach of the previously referenced provisional patent application.

It will, of course, be understood that, although particular embodiments have just been described, the claimed subject matter is not limited in scope to a particular embodiment or implementation. For example, one embodiment may be in hardware, such as implemented to operate on a device or combination of devices, for example, whereas another embodiment may be in software. Likewise, an embodiment may be implemented in firmware, or as any combination of hardware, software, and/or firmware, for example. Likewise, although the claimed subject matter is not limited in scope in this respect, one embodiment may comprise one or more articles, such as a storage medium or storage media. This storage media, such as, one or more CD-ROMs and/or disks, for example, may have stored thereon instructions, that when executed by a system, such as a computer system, computing platform, or other system, for example, may result in an embodiment of a method in accordance with the claimed subject matter being executed, such as one of the embodiments previously described, for example. As one potential example, a computing platform may include one or more processing units or processors, one or more input/output devices, such as a display, a keyboard and/or a mouse, and/or one or more memories, such as static random access memory, dynamic random access memory, flash memory, and/or a hard drive. For example, a display may be employed to display one or more queries, such as those that may be interrelated, and or one or more tree expressions, although, again, the claimed subject matter is not limited in scope to this example.

In the preceding description, various aspects of the claimed subject matter have been described. For purposes of explanation, specific numbers, systems and/or configurations were set forth to provide a thorough understanding of the claimed subject matter. However, it should be apparent to one skilled in the art having the benefit of this disclosure that the claimed subject matter may be practiced without the specific details. In other instances, well-known features were omitted and/or simplified so as not to obscure the claimed subject matter. While certain features have been illustrated and/or described herein, many modifications, substitutions, changes and/or equivalents will now occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and/or changes as fall within the true spirit of the claimed subject matter. 

The invention claimed is:
 1. A method for manipulating a complex two-dimensional graphical hierarchy for electronic processing and/or storage, the complex two-dimensional graphical hierarchy being in the form of a tree hierarchy, the method comprising: accessing instructions from one or more memory devices for execution by one or more processors; executing instructions accessed from the one or more physical memory devices by the one or more processors; storing, in at least one of the one or more physical memory devices, signal values resulting from having executed the instructions on the one or more processors; wherein the accessed instructions comprise instructions for manipulating the tree hierarchy; and wherein executing the accessed tree hierarchy manipulation instructions further comprise: reducing a tree expression comprising at least one variable representing the tree hierarchy using one or more algebraic operations on the variable tree expression to yield a reduced variable tree expression, wherein the reduced variable tree expression indicates one or more conditions under which the reduced variable tree expression is true and is simplified as compared to the tree expression; performing one or more operations on the reduced variable tree expression to yield an updated variable tree expression; and storing the updated variable tree expression in a memory device of the one or more physical memory devices.
 2. The method of claim 1, wherein the updated variable tree expression comprises an updated tree hierarchy or a representation thereof.
 3. The method of claim 1, wherein the variable tree expression comprises a single term tree expression.
 4. The method of claim 3, wherein the performing the one or more operations on the reduced variable tree expression comprises finding a correspondence for the single term tree expression on a left-hand side of an equality with at least one single term tree expression on a right-hand side of an equality.
 5. The method of claim 4, wherein the correspondence for the single term tree expression with the at least one single term tree expression on the right-hand side of the equality includes matching the single term tree expression with the at least one single term tree expression.
 6. The method of claim 1, wherein the one or more algebraic operations performed on the reduced variable tree expression comprise at least one of an inversion operation or a merger operation.
 7. The method of claim 1, wherein the one or more algebraic operations performed on the reduced variable tree expression comprise at least one of a zero-push operation or a one-push operation.
 8. The method of claim 7, wherein the zero-push operation comprises, at least in part, adding a child node and an edge to a parent node and labeling the added edge with a binary zero.
 9. The method of claim 7, wherein the one-push operation comprises, at least in part, adding a child node and an edge to a parent node and labeling the added edge with a binary one.
 10. The method of claim 1, wherein executing the accessed tree hierarchy manipulation instructions further comprising responsive to a query, comparing the reduced variable tree expression with the query to identify at least one partial match, at least one match, or a combination thereof.
 11. The method of claim 10, wherein executing the accessed tree hierarchy manipulation instructions further comprising generating a Boolean true or false responsive to an identification of a match or a partial match between the query and the reduced variable tree expression.
 12. The method of claim 1, wherein the reducing the tree expression comprises repetitive application of the one or more algebraic operations on the variable tree expression to yield the reduced variable tree expression.
 13. An article comprising: a non-transitory storage medium comprising instructions stored thereon, wherein the instructions being accessible from the non-transitory storage medium to store as physical memory states on one or more physical memory devices, the one or more physical memory devices coupled to one or more processors able to execute the instructions stored as physical memory states, the one or more physical memory devices also able to store binary digital signals quantities, if any, as physical memory states, that are to result from execution of the instructions on the one or more processors, wherein the executable instructions to manipulate a complex two-dimensional tree hierarchy; and wherein executing the complex two-dimensional graphical tree hierarchy manipulation instructions further to: reduce a tree expression to comprise at least one variable to represent the complex two-dimensional graphical tree hierarchy using one or more algebraic operations on the variable tree expression to yield a reduced variable tree expression, the reduced variable tree expression to indicate one or more conditions under which the reduced variable tree expression is to be true and to be simplified as compared to the tree expression; perform one or more operations on the reduced variable tree expression to yield an updated variable tree expression; and store the updated variable tree expression in a physical memory device of the one or more physical memory devices.
 14. The article of claim 13, wherein the reduced variable tree expression to comprise one or more queries.
 15. The article of claim 14, wherein the one or more queries are to be interrelated by one or more Boolean operations.
 16. The article of claim 13, wherein the one or more algebraic operations to comprise one or more basis expressions.
 17. An apparatus to manipulate a complex two-dimensional graphical hierarchy for electronic processing and/or storage, the complex two-dimensional graphical hierarchy being in the form of a tree hierarchy, the apparatus comprising: means for accessing instructions from one or more physical memory devices for execution by one or more processors; means for executing instructions accessed from the one or more physical memory devices by the one or more processors; means for storing, in the at least one of the one or more physical memory devices, signal values resulting from having executed the instructions on the one or more processors; wherein the accessed instructions comprise instructions for manipulating the tree hierarchy; and wherein the means for executing the accessed tree hierarchy manipulation instructions comprises: means for reducing a tree expression comprising at least one variable representing a tree hierarchy using one or more algebraic operations on the variable tree expression to yield a reduced variable tree expression, wherein the reduced variable tree expression indicates one or more conditions under which the reduced variable tree expression is true and is simplified as compared to the tree expression; means for performing one or more operations on the reduced variable tree expression to yield an updated variable tree expression; and means for storing the updated variable tree expression in a memory.
 18. The apparatus of claim 17, further comprising means for comparing the reduced variable tree expression with a query to identify at least one partial match, at least one match, or a combination thereof.
 19. The apparatus of claim 18, further comprising means for generating one or more matching expressions from the reduced variable tree expressions.
 20. The apparatus of claim 18, further comprising means for generating a Boolean true or false responsive to an identification of a match or a partial match between the query and the reduced variable tree expression.
 21. The apparatus of claim 17, wherein the means for reducing the tree expression further comprises means for using, at least in part, one or more algebraic expressions on at least a portion of the reduced variable tree expression to manipulate the tree hierarchy.
 22. An apparatus comprising: one or more processors coupled to one or more physical memory device to store executable instructions and to store binary digital signal quantities as physical memory states, wherein the executable instructions being accessible from the physical memory devices for execution by one or more processors; and the one or more processors able to store in at least one of the physical memory devices, binary signal quantities, if any, that are to result from execution of the instructions on one or more processors, wherein the accessed executable instructions comprise instructions for manipulating a tree hierarchy; and wherein executing the accessed tree hierarchy manipulation instructions further to: reduce a tree expression to comprise at least one variable to represent the tree hierarchy using one or more algebraic operations on the variable tree expression to yield a reduced variable tree expression, the reduced variable tree expression to indicate one or more conditions under which the reduced variable tree expression is to be true and is simplified as compared to the tree expression; perform one or more operations on the reduced variable tree expression to yield an updated variable tree expression; and store the updated variable tree expression in a physical memory device of the one or more physical memory devices.
 23. The apparatus of claim 22, wherein the accessed tree hierarchy manipulation instructions further to: use, at least in part, one or more algebraic operations on at least a portion of the reduced variable tree expression to manipulate the complex tree hierarchy.
 24. The apparatus of claim 23, wherein the accessed tree hierarchy manipulation instructions further to merge the at least the portion of the reduced variable tree expression with a portion of a second graphical hierarchical tree. 